A Novel Insight on Interface Traps Density (Dit) Extraction in GaN-on-Si MOS-c HEMTs - Université Grenoble Alpes
Communication Dans Un Congrès Année : 2020

A Novel Insight on Interface Traps Density (Dit) Extraction in GaN-on-Si MOS-c HEMTs

Résumé

This paper aims to investigate the interface traps density (Dit) extraction on MOS gate stacks processed on GaN-on-Si substrates. CGV (Capacitance-Conductance) measurements under different frequencies (f = 1kHz-1MHz) and temperatures (T = 20K-500K) on various Al 2 O 3 /UID-GaN MOS capacitors were carried out. Thorough analysis under dark and UV light compared to TCAD/analytical modeling reveal a strong distributed series resistance under the gate related to the high resistivity of UID-GaN layer. This effect leads to an overestimation of the actual Dit value extracted at high frequencies (> 10kHz). Choosing an adequate doping under the gate (n-type) cancels the series resistance effect and unlocks a reliable extraction through {T/f} dependent CGV measurements.
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Dates et versions

hal-04745708 , version 1 (21-10-2024)

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Citer

W. Vandendaele, S. Martin, M.-A Jaud, A. Krakovinsky, L. Vauche, et al.. A Novel Insight on Interface Traps Density (Dit) Extraction in GaN-on-Si MOS-c HEMTs. 2020 IEEE International Electron Devices Meeting (IEDM), Dec 2020, San Francisco, France. pp.23.5.1-23.5.4, ⟨10.1109/IEDM13553.2020.9371965⟩. ⟨hal-04745708⟩
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