Development of plasma etching processes for the integration of III-V semicondutors as trigate nMOSFET’s channels - Université Grenoble Alpes
Communication Dans Un Congrès Année : 2016
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hal-01882457 , version 1 (27-09-2018)

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  • HAL Id : hal-01882457 , version 1

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M. Bizouerne, E. Pargon, P. Burtin, C. Petit-Etienne, E. Latu-Romain, et al.. Development of plasma etching processes for the integration of III-V semicondutors as trigate nMOSFET’s channels. Plasma Etch and Strip in Microelectronics (PESM), 9th International Workshop, May 2016, Grenoble, France. ⟨hal-01882457⟩
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