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Communication Dans Un Congrès Année : 2019

Fully Integrated Spiking Neural Network with Analog Neurons and RRAM Synapses

Résumé

This paper presents, to the best of the authors' knowledge, the first complete integration of a Spiking Neural Network, combining analog neurons and Resistive RAM (RRAM)-based synapses. The implemented topology is a perceptron, aimed at performing MNIST classification. An existing framework was tailored for offline learning and weight quantization. The test chip, fabricated in 130nm CMOS, shows well-controlled integration of synaptic currents and no RRAM read disturb issue during inference tasks (at least 750M spikes). The classification accuracy is 84%, with a 3.6 pJ energy dissipation per spike at the synapse and neuron level (up to 5x lower vs. similar chips using formal coding).
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Dates et versions

hal-03356354 , version 1 (28-09-2021)

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Citer

A. Valentian, F. Rummens, E. Vianello, T. Mesquida, C. Lecat-Mathieu de Boissac, et al.. Fully Integrated Spiking Neural Network with Analog Neurons and RRAM Synapses. 2019 IEEE International Electron Devices Meeting (IEDM), Dec 2019, San Francisco, United States. pp.14.3.1-14.3.4, ⟨10.1109/IEDM19573.2019.8993431⟩. ⟨hal-03356354⟩
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