Cross-layer analysis of software fault models and countermeasures against hardware fault attacks in a RISC-V processor - Archive ouverte HAL Accéder directement au contenu
Article Dans Une Revue Microprocessors and Microsystems: Embedded Hardware Design Année : 2019

Cross-layer analysis of software fault models and countermeasures against hardware fault attacks in a RISC-V processor

(1) , (1) , (1) , (2) , (1)
1
2

Résumé

Fault injection is a powerful technique for attacking digital systems. Software developers have to take into account hardware fault effects when system security is a concern. Software fault models have been developed in an attempt to predict these faults. However, these models are often designed independently of any hardware consideration and thus raise the problem of realism. The generality of these models often cannot account for the specificities of each architecture. As a consequence, software countermeasures based on such software fault models do not guarantee an effective protection against fault attacks. Processor microarchitecture should be precisely analysed to better understand faulty behaviours. A crosslayer approach can then be developed, using conjointly hardware and software characteristics to design stronger software countermeasures with reasonable overheads. To illustrate this assumption, this paper shows actual faulty behaviours observed in a RISC-V processor RTL simulation, and shows that they can bypass countermeasures designed to protect against faults predicted by typical software fault models.
Fichier principal
Vignette du fichier
S0141933118304745.pdf (426.39 Ko) Télécharger le fichier
Origine : Fichiers produits par l'(les) auteur(s)

Dates et versions

hal-02426107 , version 1 (20-07-2022)

Licence

Paternité - Pas d'utilisation commerciale - CC BY 4.0

Identifiants

Citer

Johan Laurent, Vincent Beroulle, Christophe Deleuze, Florian Pebay-Peyroula, Athanasios Papadimitriou. Cross-layer analysis of software fault models and countermeasures against hardware fault attacks in a RISC-V processor. Microprocessors and Microsystems: Embedded Hardware Design , 2019, 71, pp.102862. ⟨10.1016/j.micpro.2019.102862⟩. ⟨hal-02426107⟩
183 Consultations
40 Téléchargements

Altmetric

Partager

Gmail Facebook Twitter LinkedIn More