Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain, Senior Member IEEE ,and Yiorgos Makris, Senior Member IEEE, pp.1207-1209 ,
HELP: A Hardware-Embedded Delay PUF, IEEE 2013 CEDA, SSCS and TTTC, pp.17-19 ,
Transistor-level Design of Low-Power Nanoscale Digital Circuits for Secure Applications, pp.69-72, 2012. ,
Parameter Varaition Tolerance and Error Resiliency: New Design Paradigm for the Nanoscale Era, IEEE Proceedings, pp.1718-1728, 2010. ,