Level Shifter Architecture for Dynamically Biasing Ultra-Low Voltage Subcircuits of Integrated Systems - Université Grenoble Alpes
Communication Dans Un Congrès Année : 2018

Level Shifter Architecture for Dynamically Biasing Ultra-Low Voltage Subcircuits of Integrated Systems

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Dates et versions

hal-01726964 , version 1 (08-03-2018)

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  • HAL Id : hal-01726964 , version 1

Citer

Rodrigo Iga Jadue, Rodrigo Possamai Bastos, Thiago Ferreira de Paiva Leite, O. Rolloff, Mamadou Diallo, et al.. Level Shifter Architecture for Dynamically Biasing Ultra-Low Voltage Subcircuits of Integrated Systems. IEEE International Symposium on Circuits & Systems (ISCAS 2018), May 2018, Florence, Italy. ⟨hal-01726964⟩

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