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Communication dans un congrès

On-board non-regression test of HLS tools targeting FPGA

Abstract : High-Level Synthesis (HLS) has opened an opportunity for software programmers to target FPGA more rapidly. When developing HLS tools, tests are desirable to ensure their function, reliability, and performance. When modifications are applied to a tool, Non-Regression Test (NRT) asserts that the changes have intended effect while Regression Test (RT) verifies that the tool still performs correctly without unwanted behavior. The work presented in this paper is focused on a method to automatically perform Non-Regression Test in HLS tool developments, although it can also be used as a Regression Testing technique. This method relies on a framework which allows HLS tool developers to verify the circuits generated from the tool directly on FPGA, instead of using simulations. The verification flow is automatic so that knowing the details of the system is unnecessary for developers. The framework has been tested successfully over several applications from HLS benchmark and it gives more promising results than its simulation counterpart.
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Contributeur : Arief Wicaksana <>
Soumis le : vendredi 16 juin 2017 - 17:37:22
Dernière modification le : mercredi 7 octobre 2020 - 13:20:38
Archivage à long terme le : : mercredi 10 janvier 2018 - 13:41:23


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Arief Wicaksana, Adrien Prost-Boucle, Olivier Muller, Frédéric Rousseau, Arif Sasongko. On-board non-regression test of HLS tools targeting FPGA. 2016 International Symposium On Rapid System Prototyping (RSP 2016), Oct 2016, Pittsburgh, PA, United States. pp.41-47, ⟨10.1145/2990299.2990307⟩. ⟨hal-01540944⟩



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