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hal-01400085v1
Communication dans un congrès
R. Leveugle, A. Prost-Boucle. A new automated instrumentation for emulation-based fault injection 1st IEEE Latin American Symposium on Circuits and Systems (LASCAS'10), Feb 2010, Iguaçu Falls, Brazil. IEEE, pp.220-223 |
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hal-01400094v1
Communication dans un congrès
R. Leveugle, A. Calvez, P. Vanhauwaert, P. Maistri. Statistical fault injection: how much is sufficient? 2nd IFIP International Workshop on Dependable Circuit Design (DECIDE'08), Nov 2008, Playa del Carmen, Mexico. IFIP |
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hal-01400097v1
Communication dans un congrès
K. Hadjiat, A. Ammari, R. Leveugle. Application et combinaison de deux approches d'analyse de sûreté VIIème Journées Nationales du Réseau Doctoral en Microélectronique (JNRDM'04), May 2004, Marseille, France. pp.410-412 |
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hal-01400154v1
Communication dans un congrès
R. Leveugle. Dependability issues in SRAM-based FPGA design IEEE International Conference on Electronics, Circuits and Systems (ICECS'07), Dec 2007, Marrakech, Morocco. IEEE |
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hal-01400159v1
Communication dans un congrès
R. Leveugle. Integrated systems security: hardware-based threats and solutions 1st IEEE Latin American Symposium on Circuits and Systems (LASCAS'10), Feb 2010, Iguassu, Brazil. IEEE |
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hal-01400163v1
Communication dans un congrès
R. Leveugle. Taking care of security in hardware design The Fourth International Conference on Dependability (DEPEND'11), Aug 2011, Nice, France. IEEE |
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hal-00015007v1
Communication dans un congrès
Y. Monnet, Marc Renaudin, R. Leveugle. Hardening techniques against transient faults for asynchronous circuits 11th-IEEE-International-On-Line-Testing-Symposium. 2005:, 2005, French Riviera, France. IEEE Computer Society, Los Alamitos, CA, USA, pp.129-34, 2005, <10.1109/IOLTS.2005.30> |
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hal-01400156v1
Communication dans un congrès
R. Leveugle. Chip level security: Why ? How ? IEEE International Conference on Electronics, Circuits and Systems (ICECS'08), Aug 2008, Saint Julians, Malta. IEEE |
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hal-01400095v1
Communication dans un congrès
A. Ammari, R. Leveugle. Injections de fautes transitoires dans une PLL VIIème Journées Nationales du Réseau Doctoral en Microélectronique (JNRDM'04), May 2004, Marseille, France. pp.295-297 |
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hal-01400114v1
Communication dans un congrès
R. Leveugle. Design & Test of Integrated Systems in Nanoscale Technology IEEE International Conference on Design and Test of Integrated Systems in Nanoscale Technology (DTIS'06), Sep 2006, Tunis, Tunisia. IEEE |
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hal-00015035v1
Communication dans un congrès
A. Ammari, K. Hadjiat, R. Leveugle. On combining fault classification and error propagation analysis in RT-Level dependability evaluation Proceedings.-10th-IEEE-International-On-Line-Testing-Symposium, 2004, Funchal, Madeira Island, Portugal. IEEE Comput. Soc, Los Alamitos, CA, USA, pp.227-32, 2004 |
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hal-01400158v1
Communication dans un congrès
R. Leveugle. Integrated and embedded systems security: hardware-based threats and solutions 2nd International Conference on Signals, Circuits & Systems (SCS'09), Nov 2009, Djerba, Tunisia. IEEE |
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hal-01400161v1
Communication dans un congrès
R. Leveugle. Natural and malicious soft errors: dependability and security issues in reconfigurable platforms 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC'11), Jun 2011, Montpellier, France. IEEE |
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hal-00015000v1
Communication dans un congrès
L. Anghel, R. Leveugle, P. Vanhauwaert. Evaluation of SET and SEU effects at multiple abstraction levels 11th-IEEE-International-On-Line-Testing-Symposium., 2005, French Riviera, France. IEEE Computer Society, Los Alamitos, CA, USA, 326 p., pp.309-12, 2005, <10.1109/IOLTS.2005.28> |
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hal-00015036v1
Communication dans un congrès
R. Leveugle, A. Ammari. Early SEU fault injection in digital, analog and mixed signal circuits: a global flow Proceedings.-Design,-Automation-and-Test-in-Europe-Conference-and-Exhibition, 2004, Paris, France. IEEE Comput. Soc, Los Alamitos, CA, USA, pp.590-5 /Vol.1, 2004, <10.1109/DATE.2004.1268909> |
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hal-01400093v1
Communication dans un congrès
P. Vanhauwaert, R. Leveugle. Evaluating soft error effects using probabilistic testability analysis: a case study 2nd IFIP International Workshop on Dependable Circuit Design (DECIDE'08), Nov 2008, Playa del Carmen, Mexico. IFIP |
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hal-01400111v1
Communication dans un congrès
A. Mkhinini, P. Maistri, R. Leveugle. Chiffrement homomorphique : entre développements théoriques et implantations pratiques 8ème Colloque du GdR SoC-SiP, Jun 2014, Paris, France |
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hal-01400115v1
Communication dans un congrès
R. Leveugle. Design and validation of dependable integrated systems IEEE International Conference on Electronics, Circuits and Systems (ICECS'06), Dec 2006, Nice, France. IEEE |
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hal-00015040v1
Communication dans un congrès
A. Ammari, R. Leveugle, M. Sonza Reorda, M. Violante. Detailed comparison of dependability analyses performed at RT and gate levels Proceedings.-18th-IEEE-International-Symposium-on-Defect-and-Fault-Tolerance-in-VLSI-Systems, 2003, Boston, MA, United States. IEEE Comput. Soc, Los Alamitos, CA, USA, pp.336-43, 2003, INTERNATIONAL STANDARD BOOK NUMBER: 0769520421 |
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hal-00015041v1
Article dans une revue
L. Antoni, R. Leveugle, B. Feher. Using run-time reconfiguration for fault injection applications IEEE-Transactions-on-Instrumentation-and-Measurement, 2003, Oct. ; 52(5), pp.1468-73. <10.1109/TIM.2003.817144> |
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hal-00015043v1
Communication dans un congrès
R. Leveugle, K. Hadjiat. Multi-level fault injection experiments based on VHDL descriptions: a case study Eighth IEEE International On Line Testing Workshop (IOLTW'02), Jul 2002, Isle of Bendor, France. IEEE, pp.107-11 |
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hal-00015052v1
Communication dans un congrès
R. Leveugle, R. Cercueil. High level modifications of VHDL descriptions for on-line test or fault tolerance IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'01), Oct 2001, San Francisco, CA, United States. IEEE, pp.84-91 |
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hal-00015001v1
Communication dans un congrès
R. Leveugle. A new approach for early dependability evaluation based on formal property checking and controlled mutations 11th-IEEE-International-On-Line-Testing-Symposium., 2005, French Riviera, France. IEEE Computer Society, Los Alamitos, CA, USA, pp.260-5, 2005, <10.1109/IOLTS.2005.8> |
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hal-00015009v1
Communication dans un congrès
R. Leveugle. Introduction to the special session on secure implementations 11th-IEEE-International-On-Line-Testing-Symposium, 2005, French Riviera, France. IEEE Computer Society, Los Alamitos, CA, USA, pp.115, 2005, <10.1109/IOLTS.2005.40> |
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hal-00015012v1
Communication dans un congrès
R. Leveugle, D. Cimmonet, A. Ammari. System-level dependability analysis with RT-level fault injection accuracy Proceedings.-19th-IEEE-International-Symposium-on-Defect-and-Fault-Tolerance-in-VLSI-Systems, 2004, Cannes, France. IEEE Comput. Soc, Los Alamitos, CA, USA, pp.451-8, 2004, <10.1109/DFTVS.2004.1347870> |
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hal-00015045v1
Communication dans un congrès
R. Leveugle. Automatic modifications of high level VHDL descriptions for fault detection or tolerance Proceedings-2002-Design,-Automation-and-Test-in-Europe-Conference-and-Exhibition. 2002:, 2002, Paris, France. IEEE Comput. Soc, Los Alamitos, CA, USA, pp.837-41, 2002, <10.1109/DATE.2002.998396> |
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hal-00015057v1
Communication dans un congrès
R. Leveugle. Fault injection in VHDL descriptions and emulation Proceedings-IEEE-International-Symposium-on-Defect-and-Fault-Tolerance-in-VLSI-Systems, 2000, Yamanashi, Japan. IEEE Comput. Soc, Los Alamitos, CA, USA, pp.414-19, 2000, <10.1109/DFTVS.2000.887182> |
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hal-00015042v1
Communication dans un congrès
L. Antoni, R. Leveugle, B. Feher. Using run-time reconfiguration for fault injection in hardware prototypes 17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'02), Nov 2002, Vancouver, Canada. IEEE, pp.245-253 |
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hal-00015048v1
Communication dans un congrès
R. Leveugle. A low-cost hardware approach to dependability validation of IPs Proceedings-2001-IEEE-International-Symposium-on-Defect-and-Fault-Tolerance-in-VLSI-Systems, 2001, San Francisco, CA, United States. IEEE Comput. Soc, Los Alamitos, CA, USA, pp.242-9, 2001, <10.1109/DFTVS.2001.966776> |
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hal-01400083v1
Communication dans un congrès
S. Bergaoui, R. Leveugle. Impact of compilation options on the criticality of registers in a microprocessor-based system 1st IEEE Latin American Symposium on Circuits and Systems (LASCAS'10), Feb 2010, Iguaçu Falls, Brazil. IEEE, pp.216-219, Proceedings |
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