nFET FDSOI activated by low temperature solid phase epitaxial regrowth: Optimization guidelines

Abstract : Low temperature (LT) activation on Fully Depleted Silicon On Insulator by SPER is needed for 3D sequential integration and also provides interest to obtain highly doped abrupt junctions in the standard planar technology. In this work, through the confrontation of electrical data and KMC process simulation we identify the efficient lever to optimize the low temperature device performance. This work evidences that the most suitable integration for LT FET implies a LDD implantation before the first spacer and the raised source drain epitaxy.
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http://hal.univ-grenoble-alpes.fr/hal-02049393
Contributor : Frédérique Ducroquet <>
Submitted on : Tuesday, February 26, 2019 - 1:23:33 PM
Last modification on : Wednesday, April 3, 2019 - 2:07:18 AM

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L. Pasini, P. Batude, M. Cassé, L. Brunet, P. Rivallin, et al.. nFET FDSOI activated by low temperature solid phase epitaxial regrowth: Optimization guidelines. 2014 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), Oct 2014, Millbrae, United States. pp.6a.3, ⟨10.1109/S3S.2014.7028214⟩. ⟨hal-02049393⟩

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