Secure and Flexible Trace-Based Debugging of Systems-on-Chip

Abstract : This work tackles the conflict between enforcing security of a system-on-chip (SoC) and providing observability during trace-based debugging. On one hand, security objectives require that assets remain confidential at different stages of the SoC life cycle. On the other hand, the trace-based debug infrastructure exposes values of internal signals that can leak the assets to untrusted third parties. We propose a secure trace-based debug infrastructure to resolve this conflict. The secure infrastructure tags each asset to identify its owner (to whom it can be exposed during debug) and nonintrusively enforces the confidentiality of the assets during runtime debug. We implement a prototype of the enhanced infrastructure on an FPGA to validate its functional correctness. ASIC estimations show that our approach incurs practical area and power costs.
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Article dans une revue
ACM Transactions on Design Automation of Electronic Systems, Association for Computing Machinery, 2016, 〈10.1145/2994601〉
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http://hal.univ-grenoble-alpes.fr/hal-01424899
Contributeur : David Hely <>
Soumis le : mardi 3 janvier 2017 - 09:38:05
Dernière modification le : mercredi 6 juin 2018 - 10:42:04

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Backer Jerry, David Hely, Ramesh Karri. Secure and Flexible Trace-Based Debugging of Systems-on-Chip. ACM Transactions on Design Automation of Electronic Systems, Association for Computing Machinery, 2016, 〈10.1145/2994601〉. 〈hal-01424899〉

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