Demonstration of a context-switch method for heterogeneous reconfigurable systems

Abstract : Nowadays, FPGAs are integrated in high-performance computing systems, servers, or even used as accelerators in System-on-Chip (SoC) platforms. Since the execution is performed in hardware, FPGA gives much higher performance and lower energy consumption compared to most microprocessor-based systems. However, the room to improve FPGA performance still exists, e.g. when it is used by multiple users. In multi-user approaches, FPGA resources are shared between several users. Therefore, one must be able to interrupt a running circuit at any given time and continue the task at will. An image of the state of the running circuit (context) is saved during interruption and restored when the execution is continued. The ability to extract and restore the context is known as context-switch. In the previous work [1], an automatic checkpoint selection method is proposed for circuit generation targeting reconfigurable systems. The method relies on static analysis of the finite state machine of a circuit to select the checkpoint states. States with minimum overhead will be selected as checkpoints, which allow optimal context save and restore. The maximum time to reach a checkpoint will be defined by the user and considered as the context-switch latency. The method is implemented in C code and integrated as plugin in a free and open-source High-Level Synthesis tool AUGH [2].
Type de document :
Communication dans un congrès
2016 26th International Conference on Field Programmable Logic and Applications (FPL), Aug 2016, Lausanne, Switzerland. pp.1 - 1, 2016, 〈10.1109/FPL.2016.7577384〉
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http://hal.univ-grenoble-alpes.fr/hal-01398560
Contributeur : Arief Wicaksana <>
Soumis le : vendredi 18 novembre 2016 - 15:10:01
Dernière modification le : mercredi 16 mai 2018 - 18:30:05
Document(s) archivé(s) le : jeudi 16 mars 2017 - 17:09:07

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Arief Wicaksana, Alban Bourge, Olivier Muller, Frédéric Rousseau. Demonstration of a context-switch method for heterogeneous reconfigurable systems. 2016 26th International Conference on Field Programmable Logic and Applications (FPL), Aug 2016, Lausanne, Switzerland. pp.1 - 1, 2016, 〈10.1109/FPL.2016.7577384〉. 〈hal-01398560〉

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